1. Field of the Invention
The present invention relates to a liquid-crystal display system capable of multiple-tone or multicolor displays, and more particularly to a liquid-crystal driving circuit for use in the liquid-crystal display system.
2. Description of the Related Art
A scheme for the liquid-crystal driving circuit of a liquid-crystal display system which displays multiple tones is disclosed in the official gazette of Japanese Patent Application Laid-open No. 130586/1990 entitled "Liquid-crystal display driving apparatus". This scheme will be explained with reference to FIGS. 37 and 38. FIG. 37 is a block diagram of the liquid-crystal driving circuit in the prior-art scheme, while FIG. 38 is a block diagram of a voltage divider circuit in the prior-art scheme.
Referring to FIG. 37, numeral 3701 indicates a shift register, numeral 3702 a clock, numeral 3703 the output bus of the shift register 3701, numeral 3704 a display data bus of 8 bits corresponding to display data of 256 tones, numeral 3705 a latch circuit configured of (X+1) latches, and numeral 3706 the output bus of the latch circuit 3705. In synchronism with the clock 3702, the shift register 3701 asserts its respective outputs S0 to SX one by one for time periods each being equal to one cycle of the clock signal 3702 and delivers the outputs to the output bus 3703 in succession. The display data are propagated to the display data bus 3704 in synchronism with the clock 3702. When the outputs S0 to SX of the shift register 3701 have been asserted or validated, the respective latches in the latch circuit 3705 corresponding to the asserted outputs S0 to SX operate to latch the display data therein from the display data bus 3704. The latched display data are delivered to the output bus 3706 as the latched data of the latch circuit 3705.
Besides, numeral 3707 indicates a clock synchronized with a horizontal synchronizing signal, numeral 3708 a latch circuit, numeral 3709 the output bus of the latch circuit 3708 for the upper 4 bits of the latched display data of this latch circuit, and numeral 3710 the output bus of the latch circuit 3708 for the lower 4 bits of the latched display data of this latch circuit. When the clock 3707 has been asserted, each of latches constituting the latch circuit 3708 operates to latch the latched data transferred by the output bus 3706 of the latch circuit 3705. Among the display data thus latched by each latch of the latch circuit 3708, the upper 4 bits are delivered from the output bus 3709, and the lower 4 bits are delivered from the output bus 3710.
The liquid-crystal driving circuit further includes a voltage bus 3711 which supplies voltages of 17 levels, voltage selectors 3712 each of which has an output bus 3713 and selects two of the 17-level voltages of the voltage bus 3711, voltage divider circuits 3714 each of which has an output bus 3715, and buffer circuits 3716 each of which has an output line 3717.
The voltage selector 3712 selects the voltages of 2 levels among voltages corresponding to the latched data of the output bus 3709 and then delivers the selected voltages to the output bus 3713. The voltage divider circuit 3714 divides the voltages of the 2 levels supplied from the output bus 3713, into voltages of 16 levels, and it selects a voltage corresponding to the latched data of the output bus 3710 from among the divisional voltages of the 16 levels and then delivers the selected voltage to the output bus 3715. Since the output bus 3715 of the voltage divider circuit 3714 has a high output impedance, it cannot directly drive a liquid-crystal element at high speed. Therefore, the buffer circuit 3716 is disposed to amplify the voltage of the output bus 3715 and to deliver the amplified voltage to the output line 3717. The output line 3717 is connected to the liquid-crystal element which constitutes a liquid-crystal panel. In this way, the voltage corresponding to the display data can be applied to the liquid-crystal element.
Referring to FIG. 38, numerals 3801 and 3802 indicate the upper-potential selection voltage and the lower-potential selection voltage which have been selected by the voltage selector 3712, respectively. In addition, numeral 3804 designates a group of selector elements (switching elements SWL0 to SWL3 and SWR0 to SWR3), numeral 3805 a group of weighted voltage divider resistors, and numeral 3806 a group of inverter circuits for inverting the display data 3710. Shown at numeral 3807 are inverted data generated by the inverter circuits 3806.
The operation of the liquid-crystal driving circuit in the prior art will be explained with reference to FIGS. 37 and 38.
When any of the outputs S0 to SX of the shift register 3701 has been asserted, the latch circuit 3705 latches the 8-bit display data of the display data bus 3704 therein and delivers the latched data to the output bus 3706. When the clock 3707 has been asserted, the latch circuit 3708 latches the latched data of the output bus 3706 therein. The latch circuit 3708 supplies the output bus 3709 with the upper 4 bits of the latched data and the output bus 3710 with the lower 4 bits. The output bus 3709 is led to the voltage selector 3712, which selects the two voltage levels corresponding to the latched data from the voltage levels of the voltage bus 3711 and delivers the selected voltage levels to the output bus 3713.
The voltage divider circuit 3714 illustrated in detail in FIG. 38 operates as stated below. The output bus 3713 is configured of the lines of the upper potential side selection voltage 3801 and the lower potential side selection voltage 3802, and these lines are respectively connected to both the ends of the group of voltage divider resistors 3805 connected in series. Any of the selector elements 3804 is selected depending upon the value of the display data 3710 of the lower 4 bits. Thus, the potential difference between the high potential side selection voltage 3801 and the low potential side selection voltage 3802 is divided in 16, and the resulting voltage is delivered to the output bus 3715. By way of example, in a case where the display data 3710 of the lower 4 bits is "0011", the inverted data 3807 generated by the inverter circuits 3806 becomes "1100", and the corresponding one of the selector elements 3804 falls into a conductive state. In consequence, the output bus 3715 is supplied with the voltage expressed by VL+(VU-VL).times.3/16.
Subsequently, the voltage delivered to the output bus 3715 is amplified by the buffer circuit 3716 so as to be capable of driving the liquid-crystal element. The amplified voltage is delivered to the output line 3717, and the voltage corresponding to the display data is applied to the liquid-crystal element.
In the prior-art circuit arrangement stated above, the switching elements and the voltage dividing resistor elements are connected in parallel. In order to mitigate the influences of the ON-resistances of the switching elements, therefore, the resistances of the voltage dividing resistor elements must be enlarged, so that the output impedance of the output bus 3715 heightens inevitably. This situation will be explained with reference to FIG. 8, which is an equivalent circuit diagram of the output portion of the voltage divider circuit (3714 in FIG. 37) shown in FIG. 38 and in which the ON-resistances of the switching elements are depicted by resistor elements. Referring to FIG. 8, it is supposed that the switching elements SWL0, SWL1, SWR2 and SWR3 turn ON, whereas the other switching elements turn OFF. Assuming here that the switching elements are ideal (that is, the ON-resistances R.sub.ON =0 holds), the output voltage V.sub.out of the voltage divider circuit on this occasion becomes: ##EQU1## In actuality, however, the output voltage becomes: ##EQU2## Thus, the actual output voltage differs from the ideal divisional voltage. In order to reduce the difference, the resistances of the voltage divider resistors must be enlarged.
Moreover, since the voltage divider resistors are connected in series, increase in the number of voltage divisions heightens the output impedance.
In driving the liquid-crystal panel at high speed under the condition of the high output impedance, the buffer circuit (3716 in FIG. 37) needs to be disposed at the output stage of the voltage divider circuit (3714) for the purpose of lowering the output impedance. In the prior art, therefore, the output portion of the voltage divider circuit is furnished with the buffer circuit by which the liquid-crystal element can be driven. However, as the number of tones/colors has increased more, the voltage differences between the respectively adjacent tones have become smaller, and a higher precision has been required of the buffer circuits. In order to raise the precision of the buffer circuits, a correction circuit and external correction voltages are necessitated. This poses the problems that an increased number of input pins, a correction voltage generator circuit, etc. are needed, and that the scale of the liquid-crystal driving circuit enlarges.
Meanwhile, unless the buffer circuit is used, problems as stated below are involved in addition to the above problems. When the output of the voltage divider circuit is to be directly delivered to the liquid-crystal element, the output current thereof must be enlarged in order to attain a high responsibility (in order to quickly apply a predetermined voltage to the liquid-crystal element which can be regarded as a capacitor). In order to enlarge the output current, the output impedance of the voltage divider circuit must be lowered. Herein, in the case of employing the resistors as the voltage division means, the resistances of the voltage divider resistors must be reduced for lowering the output resistance of the voltage divider circuit. However, the reduction in the resistances of the voltage divider resistors is contradictory to the aforementioned requisite that the voltage division resistances must be enlarged for reducing the difference between the ideal and actual divisional voltages. In other words, the reduction in the resistances worsens the accuracy of the voltage divisions. Further, it incurs the problem of increase in the power consumption of the voltage divider circuit.